Technically leading the Signal Integrity and Power Integrity analysis team for SERDES, NAND interfaces etc using tools like HSpice, ADS, HFSS, PowerSI etc.
Closely work with HW design, ASIC and memory design teams for reviews and feedbacks. Debug any high speed design issues in lab.
· This position requires a minimum of BS/B Tech degree with 10 or more years of relevant hardware design experience.
· Understanding on PCIe, USB, SATA, NAND Flash and DRAM would be a plus.
· The candidate must have thorough technical understanding of digital board design and high speed measurement experience.
· Should have hand on experience with simulation and modelling tools.
· The ideal candidate must have a proven ability to achieve results in a dynamic environment.
· Must be self-motivated and self-directed, however, must also have a demonstrated ability to work well with people, and must have a proven desire and ability to work as a team member in a multi-team environment.
· Ability to troubleshoot and analyze complex problems. Ability to multi-task and meet deadlines.
· Excellent written, verbal, and interpersonal skills