RTL Synthesis

Location: Bangalore
Specialization: IT- Hardware / Telecom / Technical Staff,
Industry NA
Reference: 31916

This position is with our leading IT client. Our Client is seeking a senior-level EDA Engineer to provide company-wide digital front-end implementation service and support for digital/mixed-signal designs.


Location : bangalore 

Experience 7-12 years


 Job Description:

Responsibilities may include, but are not limited to:

                     Conduct RTL Qualification, Logic Synthesis, Static Timing Analysis, and Equivalence Checking, Constraints Generation/Verification, Timing/SI Closure, Power Analysis/Optimization, Low-power Implementation/Verification.

                     Work closely with Design engineers, DFT engineers, and Physical Design engineers to provide front-end implementation services and tools/flows support.

                     Develop digital design methodologies, qualify tools/flows, interface with EDA software vendors to drive tool enhancements and coordinate training.

                     Detailed understanding of our automation flow and EDA tool functions. Perl/Tcl/Ruby/Shell scripting for flow and procedure automation.

 

Minimum Requirements:

                     Highly proficient in using DesignCompiler, PrimeTime, Conformal. Experience in Spyglass or RealIntent RTL checkers is preferred.

                     • Knowledge in timing/SI closure, DFT, and design verification is preferred.

                     • Familiar with Verilog and VHDL.

                     Strong problem-solving, written, and verbal communication skills.

                     Good programming/scripting skills in Perl/Tcl/Ruby/Shell/Java/Scala.