Products: Ethernet Switches for MSDCs and Enterprises
Job Description:
1. Understand the product requirements based on the arch definition. Provide area and power estimates for the block.
2. Work with architecture team to develop the micro-architecture and design spec.
3. Develop the RTL and work with verification to sanitize the same.
4. Lint and synthesize the design.
5. Work with physical design on the floor-plan and timing closure.
6. Proactively discuss and suggest optimizations to improve the design and reduce area/power.
7. Formal verification and coverage analysis
Job requirement:
1. MSEE/BSEE with 12-15 years of RTL design and micro-architecture experience in top VLSI companies, preferably with Network Switching background.
2. Extensive experience in designing on-chip/off-chip memory based buffer management systems & arbitration schemes.
3. Extensive experience in developing high-speed designs.
4. Exposure to coverage, formal analysis, synth and STA
5. Exposure to power analysis and power reduction techniques